Table 7.12 Floating-Point Graphics Acceleration Instructions
Instruction
Operation
Instruction Code
Privileged T Bit
FMOV DRm,XDn
FMOV XDm,DRn
FMOV XDm,XDn
FMOV @Rm,XDn
FMOV @Rm+,XDn
DRm → XDn
1111nnn1mmm01100
1111nnn0mmm11100
1111nnn1mmm11100
1111nnn1mmmm1000
1111nnn1mmmm1001
1111nnn1mmmm0110
1111nnnnmmm11010
1111nnnnmmm11011
1111nnnnmmm10111
1111nnmm11101101
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
XDm → DRn
XDm → XDn
(Rm) → XDn
(Rm) → XDn, Rm + 8 → Rm
FMOV @(R0,Rm),XDn (R0 + Rm) → XDn
FMOV XDm,@Rn
FMOV XDm,@-Rn
XDm → (Rn)
Rn – 8 → Rn, XDm → (Rn)
FMOV XDm,@(R0,Rn) XDm → (R0+Rn)
FIPR
FVm,FVn
inner_product [FVm, FVn] →
FR[n+3]
FTRV XMTRX,FVn
transform_vector [XMTRX, FVn] 1111nn0111111101
→ FVn
—
—
FRCHG
FSCHG
~FPSCR.FR → SPFCR.FR
~FPSCR.SZ → SPFCR.SZ
1111101111111101
1111001111111101
—
—
—
—
Rev. 6.0, 07/02, page 191 of 986
RENESAS [ RENESAS TECHNOLOGY CORP ]
