SERIAL I/O
11.2 Block description
11.2.7 UARTi transmit interrupt control and UARTi receive interrupt control registers
When using UARTi, 2 types of interrupts (UARTi transmit and UARTi receive interrupts) can be used. Each
interrupt has its corresponding interrupt control register. Figure 11.2.12 shows the structure of UARTi
transmit interrupt control and UARTi receive interrupt control registers.
For details about these interrupts, refer to “CHAPTER 6. INTERRUPTS.”
For the UARTi receive interrupt, a receive or receive error interrupt can be selected by the UARTi receive
interrupt mode selected bit (bit 5 at addresses 3416, 3C16).
UART0 transmit interrupt control register (Address 7116)
UART0 receive interrupt control register (Address 7216)
UART1 transmit interrupt control register (Address 7316)
b7 b6 b5 b4 b3 b2 b1 b0
UART1 receive interrupt control register (Address 7416)
Bit
0
Bit name
Function
At reset R/W
b2 b1b0
Interrupt priority level select bits
0
0
0
RW
RW
RW
0 0 0 : Level 0 (Interrupt disabled)
0 0 1 : Level 1
0 1 0 : Level 2
1
2
0 1 1 : Level 3
1 0 0 : Level 4
1 0 1 : Level 5
1 1 0 : Level 6
1 1 1 : Level 7
Interrupt request bit
Nothing is assigned.
0
RW
(Note)
0 : No interrupt requested
1 : Interrupt requested
3
7 to 4
Undefined
—
Note: When writing to this bit, use the MOVM (MOVMB) or STA (STAB, STAD) instruction.
Fig. 11.2.12 Structure of UARTi transmit interrupt control and UARTi receive interrupt control registers
7906 Group User’s Manual Rev.2.0
11-15
RENESAS [ RENESAS TECHNOLOGY CORP ]
