SERIAL I/O
11.2 Block description
11.2.10 CTS/RTS function
When the CTS function is selected, the signal input to the CTS
the transmit conditions.)
i
pin must be at “L” level. (This is one of
When the RTS function is selected, the RTS pin outputs the following signals:
i
(1) Clock synchronous serial I/O mode
When the receive enable bit (bit 2 at addresses 3516, 3D16) = “0” (reception disabled), the RTS
outputs “H” level.
i
pin
When the receive enable bit = “0” (reception disabled), the RTS
i
pin outputs “L” level by setting the
receive enable bit to “1,” or by reading the low-order byte of the UARTi receive buffer register.
When the receive enable bit = “1” (continuously reception), the RTS pin outputs “L” level by reading
i
the low-order byte of the UARTi receive buffer register.
When reception has started, the RTS pin outputs “H” level.
i
When an internal clock is selected (bit 3 at addresses 3016, 3816 = “0”), do not select the RTS function
because the RTS output is undefined.
(2) UART mode
When the receive enable bit (bit 2 at addresses 3516, 3D16) = “0” (reception disabled), the RTS
i
pin
outputs “H” level.
When the receive enable bit = “0” (reception disabled), the RTS pin outputs “L” level by setting the
i
receive enable bit to “1,” or by reading the low-order byte of the UARTi receive buffer register.
When the receive enable bit = “1” (continuously reception), the RTS pin outputs “L” level by reading
i
the low-order byte of the UARTi receive buffer register.
When reception has started, the RTS
i
pin outputs “H” level.
Selection of the CTS/RTS function depends on the following bits.
•CTS/RTS function select bit (bit 2 at addresses 3416, 3C16: see Figure 11.2.3.)
•CTS/RTS enable bit (bit 4 at addresses 3416, 3C16: see Figure 11.2.3.)
•CTS
•CTS
0
/RTS
/RTS
0
separate select bit (bit 0 at address AC16: see Figure 11.2.13.)
separate select bit (bit 1 at address AC16: see Figure 11.2.13.)
1
1
Table 11.2.1 lists the selection of the CTS/RTS function.
Table 11.2.1 Selection of CTS/RTS function
Functions
/CLK pin P1 /CTS
CTS/RTS CTSi/RTSi CTS/RTS
enable bit separate select bit function select bit
P10/CTS0/RTS0 pin P1
1
/CTS
0
0
4
1
/RTS
1
pin P1
5
/CTS
1
/CLK pin
1
P11 or CLK0
P11 or CLK0
P15 or CLK1
P15 or CLK1
0
CTS0
RTS0
CTS1
RTS1
RTS1
P14
0
0
1
1
1
CTS0 (Notes 1, 2)
CTS1 (Notes 1, 2)
ꢀ
ꢀ
RTS0
P10
ꢀ
P11 or CLK0
P15 or CLK1
ꢀ: It may be either “0” or “1.”
Notes 1: When using the P1
P1 direction register to “0.”
2: When CTS /RTS separation is selected, the CLK
1
or P1
5
pin as the CTS pin, be sure to clear the corresponding bit of the port
i
i
i
i
pin cannot be used. Accordingly, CTS
i
/RTS
i
cannot be separated in the clock synchronous serial I/O mode. When separating CTS
UART mode, be sure to select an internal clock.
i
/RTS in
i
7906 Group User’s Manual Rev.2.0
11-19
RENESAS [ RENESAS TECHNOLOGY CORP ]
