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RM7965A-900UI 参数 Datasheet PDF下载

RM7965A-900UI图片预览
型号: RM7965A-900UI
PDF下载: 下载PDF文件 查看货源
内容描述: [Microprocessor, 64-Bit, 900MHz, CMOS, PBGA256, 27 X 27 MM, 1.62 MM HEIGHT, MO-192BAL-2, CSBGA-256]
分类和应用: 时钟外围集成电路
文件页数/大小: 74 页 / 508 K
品牌: PMC [ PMC-SIERRA, INC ]
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RM7965A-900UI 900 MHz 64-bit Microprocessor Data Sheet  
4.21 JTAG Interface  
The RM7965A interface supports JTAG boundary scan in conformance with IEEE 1149.1. The  
JTAG interface is useful for checking the integrity of the processor’s pin connections.  
4.22 Reset Sequence  
The RM7965A uses the same reset interface that is used on the RM7000 and RM5200 product  
families. This single reset interface is used to reset the entire system.  
Both power on reset and cold reset completely initialize the RM7965A. The configuration mode  
bit stream is read into the device to configure the E9000 core and the external bus interface (see  
Section 8). The configuration stream is read in when the VccOK input signal has been asserted  
and ColdReset* and Reset* remain asserted. During this time, the PLL is achieving lock.  
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.  
Document No.: PMC-2100294, Issue 2  
29  
 
 
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