RM7965A-900UI 900 MHz 64-bit Microprocessor Data Sheet
divide
square root
reciprocal
reciprocal square root
conditional moves
conversion between fixed-point and floating-point format
conversion between floating-point formats
floating-point compare
Table 6 gives the latencies of the floating-point instructions in internal processor cycles.
Table 6 Floating Point Latencies and Repeat Rates
Operation
Latency
Repeat Rate
single/double
single/double
fadd
4
1
fsub
4
1
fmult
4/5
1/2
fmadd
fmsub
fdiv
4/5
1/2
4/5
1/2
21/36
19/34
fsqrt
21/36
19/34
frecip
21/36
19/34
frsqrt
38/68
36/66
fcvt.s.d
fcvt.s.w
fcvt.s.l
fcvt.d.s
fcvt.d.w
fcvt.d.l
fcvt.w.s
fcvt.w.d
fcvt.l.s
fcvt.l.d
fcmp
4
6
6
4
4
4
4
4
4
4
1
1
1
1
3
3
1
1
1
1
1
1
1
1
1
1
fmov, fmovc
fabs, fneg
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2100294, Issue 2
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