RM7965A-900UI 900 MHz 64-bit Microprocessor Data Sheet
3
Block Diagram
Figure 1 Block Diagram
On-Chip Debug
64-bit Integer Unit
Dual-Issue Superscalar
64-bit Floating Point Unit
Double/Single IEEE-754
Branch Trace Buffer
Integer Multiplier
Instruction Dispatch
8K Entry Branch History Tbl
Instruction Cache
16 KB, 4-way
Line Lockable
Data Cache
Memory Manager
16 KB, 4-way
64-Entry, Dual Page
Line Lockable
Secondary Cache
256 KB, 4-way
Line Lockable
Interface Unit
System Control
E9000 Core
SysAD
System Interface*
Interrupt
Interface
Cache Test
Mode
PLL & Clock
EJTAG/JTAG
Controller
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2100294, Issue 2
13
PMC [ PMC-SIERRA, INC ]
