Released
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
Information Memory”. Therefore, the ETT1 CPU can create a cell that has an incorrect CRC value. This
can be used to test the CRC detection logic at the linecard.
Also, the Dataslice uses internal tables to encode and decode the symbols sent to/received from the
Serdes. Thus it is possible to configure these tables so that they will produce erroneous codes. This can be
used to check that the 8b/10b decode is operating correctly.
1.12.4 ETT1 Internal Datapath Tests
The previous section describes tests that can verify the integrity of the link between the linecard and the
ETT1 fabric. This section describes a test that can verify the internal datapaths. Figure 53 shows the
datapaths that will be tested.
Figure 53. Testing the ETT1 Internal Datapaths
Portcard
Dataslice (6 of)
Xbar (6 of)
Fiber Link
Scheduler
EPP
OOB
Satellite
OOB
Controller
ETT1 CPU
The objective is to create a packet in the Dataslice and have it traverse the usual internal ETT1 sequence
of Scheduler-request, Scheduler-grant, forward-cell.
The steps are as follows:
1. The CPU writes to the Dataslices, creating a cell in one of the virtual output queues corresponding
to itself -- i.e. it is going to send a cell to itself.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
113
PMC [ PMC-SIERRA, INC ]
