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PM9312-UC 参数 Datasheet PDF下载

PM9312-UC图片预览
型号: PM9312-UC
PDF下载: 下载PDF文件 查看货源
内容描述: 增强TT1 ™交换机结构 [ENHANCED TT1⑩ SWITCH FABRIC]
分类和应用:
文件页数/大小: 343 页 / 5229 K
品牌: PMC [ PMC-SIERRA, INC ]
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Released  
PMC-Sierra, Inc.  
PM9311/2/3/5 ETT1™ CHIP SET  
Data Sheet  
PMC-2000164  
ISSUE 3  
ENHANCED TT1™ SWITCH FABRIC  
1.12.2 AIB Link Tests  
All of the ETT1 devices use the high-speed AIB links for inter-device communication. The AIBs are used  
exclusively for inter-device links between PCBs. The AIB links associated with a subsystem can be tested  
while the subsystem is offline.  
The following actions describe the procedure that should be used to test an AIB link attached to an offline  
subsystem (one end of the link may be attached to an online subsystem).  
1. If the other end of the AIB is attached to an online (active) subsystem then ensure that the AIB is  
ignored by that subsystem, as follows:  
Dataslice: this (test) AIB should be the secondary link.  
EPP: this (test) AIB should be the secondary link.  
Scheduler: disable the port associated with this (test) AIB. (Use the Enable Port register).  
Xbar: no action needed.  
2. Assert the reset control to both ends of the test AIB.  
3. Enable the transmitters at both ends of the AIB.  
4. De-assert the reset control to both ends of the test AIB.  
5. The link should now come up -- the Ready bits associated with the link should be ‘1’. Interrupts will  
also be generated if the mask bits are set appropriately.  
6. Disable the transmitter at one end of the AIB.  
7. The far end of the AIB should indicate CRC errors and that the link is not ready. (A few CRC errors  
are generated before the link is considered down.)  
8. Repeat steps 2 - 6 as needed to ensure that the link is OK. Also, leave the link up for a soak test  
and ensure that no CRC errors are received.  
1.12.3 Linecard to ETT1 Link Diagnostics  
When a new portcard in installed in the ETT1 Fabric it will be necessary to ensure that the portcard is  
operating correctly before bring it online. This section describes a number of tests that can be performed to  
verify the linecard-to-ETT1 side of the card.  
Figure 50 shows an example architecture of the portcard and its connection to the linecard on the left and  
the ETT1 CPU on the right. The Dataslice is shown with two sets of queues.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
109  
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