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PM7385 参数 Datasheet PDF下载

PM7385图片预览
型号: PM7385
PDF下载: 下载PDF文件 查看货源
内容描述: 84 LINK , 672通道帧引擎和数据链路管理与ANY -PHY分组接口 [84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER WITH ANY-PHY PACKET INTERFACE]
分类和应用:
文件页数/大小: 244 页 / 2231 K
品牌: PMC [ PMC-SIERRA, INC ]
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PM7385 FREEDM-84A672  
DATA SHEET  
PMC-1990114  
ISSUE 6  
84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER  
WITH ANY-PHY PACKET INTERFACE  
Pin Name  
Type  
Pin  
No.  
Function  
TPA1[0]  
TPA1[1]  
TPA1[2]  
TPA2[0]  
TPA2[1]  
TPA2[2]  
Tristate D26  
The transmit packet available signals (TPA1[2:0]  
and TPA2[2:0]) reflects the status of a poll of  
two transmit channel FIFOs. TPA1[2:0] returns  
the polled results for channel address ‘n’  
Output  
F23  
E24  
D25  
C26  
B23  
provided on TXADDR[12:0] and TPA2[2:0]  
returns the polled results for channel address  
‘n+1’. TPAn[2] reports packet underrun events  
and TPAn[1:0] report the fill state of the transmit  
channel FIFO. TPAn[2] is set high when one or  
more packets has underrun on the channel and  
a further data transfer has occurred since it was  
last polled. When TPAn[2] is set low, no packet  
has underrun on the channel since the last poll.  
TPAn[1:0] are coded as follows:  
TPAn[1:0] = “11” => Starving  
TPAn[1:0] = “10” => (Reserved)  
TPAn[1:0] = “01” => Space  
TPAn[1:0] = “00” => Full  
A “Starving” polled response indicates that the  
polled transmit channel FIFO is at risk of  
underflowing and should be supplied with data  
as soon as possible. A “Space” polled response  
indicates that the polled transmit channel FIFO  
can accept XFER[3:0] plus one blocks (16 bytes  
per block) of data. A “Full” polled response  
indicates that the polled transmit channel FIFO  
cannot accept XFER[3:0] plus one blocks of  
data. (XFER[3:0] is a per-channel  
programmable value – see description of  
register 0x38C.)  
It is the responsibility of the external controller to  
prevent channel underflow conditions by  
adequately polling each channel before data  
transfer.  
TPAn[2:0] are tristate during reset and when a  
device address other than the FREEDM-  
84A672’s base address is provided on  
TXADDR[12:10].  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
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