RELEASED
PM7383 FREEDM-32A256
DATASHEET
PMC-2010336
ISSUE 1
FRAME ENGINE AND DATA LINK MANAGER 32A256
Pin Name
Type
Pin
No.
Function
RPA
Tristate R4
The receive packet available signal (RPA)
reflects the status of a poll on the receive APPI
of a FREEDM-32A256 device. When RPA is set
high, the polled FREEDM-32A256 device has
XFER[3:0] plus one blocks (16 bytes per block)
of data to transfer, or alternatively, a smaller
amount of data which includes an end of packet.
When RPA is set low, the polled FREEDM-
32A256 device does not have data ready to
transfer. (XFER[3:0] is a per-channel
Output
programmable value – see description of
register 0x208.)
A FREEDM-32A256 device must not be
selected for receive data transfer unless it has
been polled and responded that it has data
ready to transfer.
When the RXADDR[2:0] inputs match the base
address in the RAPI256 Control register, that
FREEDM-32A256 device drives RPA one
RXCLK cycle after sampling RXADDR[2:0].
RPA is tristate during reset and when a device
address other than the FREEDM-32A256’s base
address is provided on RXADDR[2:0].
RPA is updated on the rising edge of RXCLK.
PROPRIETARY AND CONFIDENTIAL
29
PMC [ PMC-SIERRA, INC ]
