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PM7383-PI 参数 Datasheet PDF下载

PM7383-PI图片预览
型号: PM7383-PI
PDF下载: 下载PDF文件 查看货源
内容描述: 帧引擎和数据链路管理32A256 [FRAME ENGINE AND DATA LINK MANAGER 32A256]
分类和应用:
文件页数/大小: 231 页 / 1917 K
品牌: PMC [ PMC-SIERRA, INC ]
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RELEASED  
PM7383 FREEDM-32A256  
DATASHEET  
PMC-2010336  
ISSUE 1  
FRAME ENGINE AND DATA LINK MANAGER 32A256  
Pin Name  
Type  
Input  
Pin  
No.  
R1  
Function  
RENB  
The receive enable signal (RENB) qualifies the  
RXADDR[2:0] signals for selection of a  
FREEDM-32A256 device. When RENB is  
sampled high and then low in consecutive  
RXCLK cycles, the address on RXADDR[2:0]  
during the cycle when RENB is sampled high  
selects a FREEDM-32A256 device enabling it to  
output data on the receive APPI. The Rx APPI  
of each FREEDM-32A256 device is identified by  
the base address in the RAPI256 Control  
register.  
The polling function of the RXADDR[2:0] and  
RPA signals operates regardless of the state of  
RENB.  
RENB may also be used to throttle the  
FREEDM-32A256 during data transfer on the  
Rx APPI. When the FREEDM-32A256 samples  
RENB high during data transfer, the FREEDM-  
32A256 will pause the data transfer and tri-state  
the receive APPI outputs (except RPA) until  
RENB is returned low. Since the Any-PHY bus  
specification does not support deselection  
during data transfers, the address on the  
RXADDR[2:0] inputs during the cycle before  
RENB is returned low must either re-select the  
same FREEDM-32A256 device or be a null  
address.  
To commence data transfer, RENB must be  
sampled low following device selection.  
It is the responsibility of the external controller to  
prevent overflow by providing each FREEDM-  
32A256 device on an Any-PHY point to multi-  
point bus sufficient bandwidth through selection.  
RENB is sampled on the rising edge of RXCLK.  
PROPRIETARY AND CONFIDENTIAL  
30  
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