RELEASED
PM7383 FREEDM-32A256
DATASHEET
PMC-2010336
ISSUE 1
FRAME ENGINE AND DATA LINK MANAGER 32A256
Pin Name
Type
Pin
No.
Function
TPAn[2:0] are updated on the rising edge of
TXCLK.
TRDY
Tristate R3
Output
The transmit ready signal (TRDY) indicates the
ability of the transmit Any-PHY packet interface
(APPI) to accept data. When TRDY is set low,
the transmit APPI is unable to accept further
data. When TRDY is set high, data provided on
the transmit APPI will be accepted by the
FREEDM-32A256 device.
TRDY is asserted one TXCLK cycle after TSX is
sampled high. TRDY is asserted by the
FREEDM-32A256 device which was selected by
the in-band channel address on TXDATA[15:0]
when TSX was sampled high. If TRDY is driven
low, the external controller must hold the data
on TXDATA[15:0] until TRDY is driven high.
TRDY may be driven low for 0 or more TXCLK
cycles before it is driven high. TRDY is always
driven tristate the TXCLK cycle after it is driven
high.
TRDY is tristate during reset.
TRDY is updated on the rising edge of TXCLK.
It is recommended that TRDY be connected
externally to a weak pull-up, e.g. 10 kꢂ.
PROPRIETARY AND CONFIDENTIAL
25
PMC [ PMC-SIERRA, INC ]
