RELEASED
PM7350 S/UNI DUPLEX
DATA SHEET
PMC-1980581
ISSUE 8
DUAL SERIAL LINK PHY MULTIPLEXER
Ball
Name
Ball
No. Function
Type
High Speed LVDS Links
OSOC
Output
L7 In all bus modes, OSOC is updated on the rising
edge of OFCLK. When not presenting valid data,
OSOC is high impedance.
In SCI-PHY/Utopia bus slave mode (OMASTER =
0, OANYPHY = 0) the output port start of cell
(OSOC) indication signal marks the first word of the
cell transfer on the ODAT[15:0] data bus. OSOC is
driven immediately upon sampling OENB low if the
previous polling cycle resulted in this device being
selected (see the OCA description below).
In Any-PHY bus slave mode (OMASTER = 0,
OANYPHY = 1) the output port start of cell (OSOC)
indication signal marks the second word of the cell
transfer on the ODAT[15:0] data bus. OSOC is
driven after one OFCLK cycle delay upon sampling
OENB low if the previous polling cycle resulted in
this device being selected (see the OCA description
below). Autonomous deselection occurs after the
last word of a cell resulting in setting OSOC high-
impedance until reselection.
In SCI-PHY/Utopia bus master mode (OMASTER =
1, OANYPHY = 0) the output port start of cell
(OSOC) indication signal marks the first word of the
cell transfer on the ODAT[15:0] data bus. OSOC is
valid coincident with OENB assertion..
When OANYPHY is high, autonomous deselection
occurs after the last word of a cell resulting in
setting OSOC high-impedance until reselection.
This output is only active if the SCIANY input is a
logic high.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
32
PMC [ PMC-SIERRA, INC ]
