RELEASED
PM7350 S/UNI DUPLEX
DATA SHEET
PMC-1980581
ISSUE 8
DUAL SERIAL LINK PHY MULTIPLEXER
Ball
Name
Ball
No. Function
Type
High Speed LVDS Links
OANYPHY
Input
M5 The Output Port Any-PHY configuration
(OANYPHY) input determines the protocol of the
SCI-PHY/Any-PHY output port interface. OANYPHY
is only active if the SCIANY input is a logic high.
If OANYPHY is logic low, the interface complies to
the SCI-PHY/Utopia specification.
If OANYPHY is logic high, the interface complies to
the Any-PHY specification. The Any-PHY protocol
is supported only when the output port cell interface
is configured as a bus slave (IMASTER input must
be set to logic low if OANYPHY is high).
OANYPHY is an asynchronous input and is
expected to be held static.
OMASTER
Input
M11 The Output Port Master select (OMASTER) pin
determines the direction of the output port cell
interface control signals.
If OMASTER is high the OANYPHY must be low.
The output port of the S/UNI-DUPLEX is a bus
master that complies with the SCI-PHY/Utopia
transmit protocol. The OADDR[4:0], OAVALID,
OENB signals are outputs and the OCA signal is an
input.
If OMASTER is low, the output port of the S/UNI-
DUPLEX is a bus slave and complies with the SCI-
PHY/Utopia or the Any-PHY receive protocol
depending on the state of the OANYPHY input.
The OADDR[4:0], OAVALID, OENB signals are
inputs. The OCA signal is an output.
This input is only active if the SCIANY input is a
logic high.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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