RELEASED
PM7350 S/UNI DUPLEX
DATA SHEET
PMC-1980581
ISSUE 8
DUAL SERIAL LINK PHY MULTIPLEXER
Register 0x70: Transmit Serial Indirect Channel Select
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R
CBUSY
CRWB
X
0
X
X
0
0
0
0
R/W
Unused
Unused
CHAN[3]
CHAN[2]
CHAN[1]
CHAN[0]
R/W
R/W
R/W
R/W
This register provides the channel number used to access the channel provision
RAM of the transmit Clocked Serial Data Interface. Writing to this register
triggers an indirect channel register access.
CHAN[3:0]:
The indirect channel number bits (CHAN[3:0]) indicate the channel to be
configured or interrogated in the indirect access.
CRWB:
The channel indirect access control bit (CRWB) selects between a configure
(write) or interrogate (read) access to the channel provision RAM. Writing a
logic zero to CRWB triggers an indirect write operation. Data to be written is
taken from the Transmit Serial Indirect Channel Data registers. Writing a logic
one to CRWB triggers an indirect read operation. The read can be found in
the Transmit Serial Indirect Channel Data registers.
CBUSY:
The indirect access status bit (CBUSY) reports the progress of an indirect
access. CBUSY is set to logic 1 when a write to the Transmit Serial Indirect
Channel Select register triggers an indirect access and will stay high until the
access is complete. This register should be polled to determine when data
from an indirect read operation is available in the Transmit Serial Indirect
Channel Data registers or to determine when a new indirect write operation
may commence.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
168
PMC [ PMC-SIERRA, INC ]
