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PM7350-PGI 参数 Datasheet PDF下载

PM7350-PGI图片预览
型号: PM7350-PGI
PDF下载: 下载PDF文件 查看货源
内容描述: [Support Circuit, 1-Func, CMOS, PBGA160, 15 X 15 MM, 1.81 MM HEIGHT, PLASTIC, BGA-160]
分类和应用: ATM异步传输模式电信电信集成电路
文件页数/大小: 245 页 / 898 K
品牌: PMC [ PMC-SIERRA, INC ]
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RELEASED  
PM7350 S/UNI DUPLEX  
DATA SHEET  
PMC-1980581  
ISSUE 8  
DUAL SERIAL LINK PHY MULTIPLEXER  
LCDV:  
The LCDV bit gives the Loss of Cell Delineation state. When LCD is logic 1,  
an out of cell delineation (OCD) defect has persisted for the number of cells  
specified in the LCD Count Threshold register. When LCD is logic 0, no OCD  
has persisted for the number of cells specified in the LCD Count Threshold  
register. The cell time period can be varied by using the LCDC[7:0] register  
bits in the LCD Count Threshold register.  
OOCDV:  
The OOCDV bit is set to logic 1 when the logical channel is not currently in  
the SYNC state.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
165  
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