S/UNI-IMA-4 Telecom Standard Product Data Sheet
Released
10.7.2 Interrupt Driven Error/Status Reporting
The interrupt logic has several layers. The top layer of the interrupt logic, the Master Interrupt
Register, indicates from which block the interrupt came. Once the block is determined the
processor can access the appropriate block to determine the interrupt cause.
TC Layer Interrupts
The TC layer sources 4 different interrupts that are reported through a FIFO structure. As each
interrupt occurs it is placed into a FIFO along with a Link Identifier to uniquely identify the
link. The error conditions reported through this structure include HEC Errors, Loss of Cell
Delineation (LCD) state change, Out of Cell Delineation (OCD) state change, and Receive Link
FIFO overflow. To determine the actual states of LCD and OCD it is necessary to query the
individual link status. If this FIFO overflows, it is necessary to query the status of all links in
order to retrieve accurate state information.
IMA Interrupts
The IMA sub-layer sources four interrupts: RIPP_INTR, TIMA_INTR, RDAT_INTR, and
ICP_CELL_AVL. The RIPP_INTR indicates that either a status change or an error occurred on
an IMA group. The RIPP Interrupt status FIFO contains the groups that have enabled conditions
active. The RIPP Interrupt status FIFO is managed so that each group will only ever have a
single entry in the FIFO. To facilitate interrupt processing, a RIPP command is provided to
gather all interrupts and status for a group and all of the links within the group in one snapshot.
TIMA_INTR provides information that a link FIFO has overflowed. During normal operations,
this will only happen when: (1) the TIMA is misconfigured or (2) the rate difference between
the clocks in an IMA group is greater than the maximum tolerance. To determine which link has
experienced a problem, the TIMA Link FIFO Overflow Status registers should be read.
RDAT_INTR indicates either: (1) that cells were dropped due to Any-PHY/UTOPIA congestion
or (2) that TC group cells were dropped due to FIFO overflow. To determine the cause of the
interrupt, the RDAT Master Interrupt register should be read.
ICP_CELL_AVL indicates that an ICP cell is available in the ICP cell buffer. To enable
diagnostics, the capability to forward a group’s ICP cells to the microprocessor is provided.
When a cell is forwarded to the microprocessor, it is placed in the ICP cell buffer and the
interrupt is triggered. As new ICP cells arrive, they overwrite the ICP cell buffer unless the
buffer is locked for reading. Once the ICP cell buffer is locked, further ICP cells will not be
forwarded until the ICP cell buffer is unlocked. This trace can be enabled on a per-group basis.
Miscellaneous Interrupts
MISC_INTR indicates that an interrupt condition exists in the Miscellaneous Interrupt register.
These bits are read-and-clear and usually indicate that transitory conditions have occurred, such
as parity errors, SDRAM CRC errors, interrupt FIFO overflows, and UTOPIA L2 interface
errors.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2020889, Issue 2
92
PMC [ PMC-SIERRA, INC ]
