欢迎访问ic37.com |
会员登录 免费注册
发布采购

PM7348 参数 Datasheet PDF下载

PM7348图片预览
型号: PM7348
PDF下载: 下载PDF文件 查看货源
内容描述: [ATM/SONET/SDH IC, CMOS, PBGA324,]
分类和应用: ATM异步传输模式
文件页数/大小: 318 页 / 1736 K
品牌: PMC [ PMC-SIERRA, INC ]
 浏览型号PM7348的Datasheet PDF文件第92页浏览型号PM7348的Datasheet PDF文件第93页浏览型号PM7348的Datasheet PDF文件第94页浏览型号PM7348的Datasheet PDF文件第95页浏览型号PM7348的Datasheet PDF文件第97页浏览型号PM7348的Datasheet PDF文件第98页浏览型号PM7348的Datasheet PDF文件第99页浏览型号PM7348的Datasheet PDF文件第100页  
S/UNI-IMA-4 Telecom Standard Product Data Sheet  
Released  
11 Normal Mode Register Description  
Normal mode registers are used to configure and monitor the operation of the S/UNI-IMA-4.  
Normal mode registers (as opposed to test mode registers) are selected when A[10] is low.  
Notes on Normal Mode Register Bits:  
Writing values into unused register bits has no effect. However, to ensure software compatibility with  
future, feature-enhanced versions of the product, unused register bits must be written with logic zero.  
Reading back unused bits can produce either a logic one or a logic zero; hence, unused register bits  
should be masked off by software when read.  
All configuration bits that can be written into can also be read back. This allows the processor controlling  
the S/UNI-IMA-4 to determine the programming state of the block.  
Writeable normal mode register bits are cleared to logic zero upon reset unless otherwise noted.  
Writing into read-only normal mode register bit locations does not affect S/UNI-IMA-4 operation unless  
otherwise noted.  
Certain register bits are reserved. These bits are associated with megacell functions that are unused in  
this application. To ensure that the S/UNI-IMA-4 operates as intended, reserved-register bits must  
only be written with logic zero. Similarly, writing to reserved registers should be avoided.  
11.1 Global Registers  
Register 0x000: Global Reset  
Bit  
15  
14  
13:7  
6:4  
3:0  
Type  
R/W  
RO  
Function  
RESET  
BIST_DONE  
Unused  
TYPE[2:0]  
ID[3:0]  
Default  
1
X
0
000  
0001  
RO  
RO  
ID[3:0]  
The ID bits can be read to provide a binary number indicating the S/UNI-IMA-4 feature  
version. These bits are incremented only if features are added in a revision of the chip.  
TYPE[2:0]  
The TYPE bits can be read to distinguish the S/UNI-IMA-4 from the other members of the  
S/UNI-IMA family of devices. The S/UNI-IMA-4 is identified by a value of “000”.  
BIST_DONE  
The BIST_DONE indicates when the internal ram initialization is complete. Once the ram  
initialization is complete, the internal rams may be accessed. Prior to BIST_DONE  
transitioning to a “1”, any internal ram accesses are ignored.  
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.  
Document No.: PMC-2020889, Issue 2  
96