S/UNI-IMA-4 Telecom Standard Product Data Sheet
Released
LBUSY
The indirect access status bit (LBUSY) reports the progress of an indirect access. A write to
the Indirect Link Address register triggers an indirect access and sets LBUSY to logic 1.
LBUSY stays high until the access is completed. At which point, LBUSY will be set low.
This register should be polled to determine either: (1) when data from an indirect read
operation is available in the Indirect Data register or (2) when a new indirect write operation
may commence.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2020889, Issue 2
127
PMC [ PMC-SIERRA, INC ]
