S/UNI-IMA-4 Telecom Standard Product Data Sheet
Released
Register 0x04E: SDRAM DIAG READ CMD 1
Bit
15:0
Type
R/W
Function
RD_BUFFER ADDR[15:0]
Default
0
RD_BUFFER_ADDR[15:0]
Indicates the lower 16 bits of the addresses of the cell buffer to read. SDRAM DIAG Read
CMD 2 provides the upper address bit and triggers the burst access to happen.
Register 0x050: SDRAM DIAG READ CMD 2
Bit
15
Type
R
Function
RDBUSY
Default
0
14:1
0
Unused
RD_BUFFER ADDR[16]
R/W
A write to the SDRAM DIAG READ CMD 2 register will trigger a transfer of data from the
external SDRAM to the Read Burst Ram. The lower bits of the address of the cell buffer in the
external SDRAM are given in the SDRAM DIAG READ CMD 1 register.
RD_BUFFER_ADDR[16]
Indicates the upper bit of the addresses of the cell buffer to read. SDRAM DIAG READ
CMD 1 provides the lower address bits.
RDBUSY
The Read Busy bit (RDBUSY) reports the progress of the read access to SDRAM.
RDBUSY is set high when this register is written; this triggers the SDRAM access; it stays
high until the access is complete. At which point, RD_BUSY will be set low. This register
should be polled to determine when the data is available in the Burst Ram.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2020889, Issue 2
123
PMC [ PMC-SIERRA, INC ]
