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PM7348 参数 Datasheet PDF下载

PM7348图片预览
型号: PM7348
PDF下载: 下载PDF文件 查看货源
内容描述: [ATM/SONET/SDH IC, CMOS, PBGA324,]
分类和应用: ATM异步传输模式
文件页数/大小: 318 页 / 1736 K
品牌: PMC [ PMC-SIERRA, INC ]
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S/UNI-IMA-4 Telecom Standard Product Data Sheet  
Released  
OOCDE  
The OOCDE bit enables the generation of an interrupt due to a change in the cell  
delineation state. When OOCDE is set to logic 1, the interrupt is enabled.  
DDELIN  
The indirect disable delineate enable bit (DDELIN) configures the TC processor to perform  
cell delineation and header error detection on the incoming data stream. When DDELIN is  
set to logic 0, the cell alignment is established and maintained on the incoming data stream.  
When DDELIN is set to logic 1, the RTTC does not perform any processing on the  
incoming stream, but passes data through transparently.  
DDSCR  
43  
The DDSCR bit controls the descrambling of the cell payload with the polynomial x + 1.  
When DDSCR is set to logic 1, cell payload descrambling is disabled. When DDSCR is set  
to logic 0, payload descrambling is enabled.  
IDLEPASS  
The IDLEPASS bit controls the function of the idle cell filter. When IDLEPASS is written  
with a logic 0, all idle cells (i.e., the first four bytes of a cell: x00, x00, x00, and x01) are  
filtered out. When IDLEPASS is logic 1, idle cells are passed to the Receive IMA Data  
Processor. For IMA links, this bit must be set to a logic 1 to allow for proper IFSM  
operation (the Receive IMA Data Processor will drop cells according to the configuration of  
IMA_IDLE_FWD_EN and the current defects and RX LSM). For TC-only links, the  
Receive IMA Data Processor will forward idle cells. If this is undesirable, then IDLEPASS  
must be configured to a logic 0.  
UNASSPASS  
When UNASSPASS is written with a logic 0, all unassigned cells (i.e., the first four bytes of  
a cell: x00, x00, x00, and x00) are filtered out. When UNASSPASS is logic 1, unassigned  
cells are passed to the Receive IMA Data Processor. For IMA links, this bit must be set to a  
logic 1 to allow for proper IFSM operation (unassigned cells will be forwarded by the  
device). For TC-only links, the Receive IMA Data Processor will forward unassigned cells.  
If this is undesirable, then UNASSPASS must be configured to a logic 0.  
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.  
Document No.: PMC-2020889, Issue 2  
129  
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