Released
Datasheet
PM73487 QRT
PMC-Sierra, Inc.
PMC-980618
Issue 3
622 Mbps ATM Traffic Management Device
Symbol
Parameter
Signals
ALRAM_CLK
Min
Max
Units
Tcyc
Tch
Clock period
10
3
ns
ns
ns
ns
Clock high period
Clock low period
Address setup time
ALRAM_CLK
ALRAM_CLK
Tcl
3
Tadrsu
ALRAM_ADD(18:0),
ALRAMADD17N,
ALRAMADD18N
2.7
Tadrh
Address hold time
ALRAM_ADD(18:0),
ALRAMADD17N,
ALRAMADD18N
1.5
ns
Toesu
Toeh
Tadss
Tadh
Tds
Output enable setup time
Output enable hold time
Address strobe setup time
Address strobe hold time
(Write) Data valid before clock
(Write) Data valid after clock
Write enable setup time
Write enable hold time
/ALRAM_OE
3.5
-1
ns
ns
ns
ns
ns
ns
ns
ns
/ALRAM_OE
/ALRAM_ADSC
/ALRAM_ADSC
ALRAM_DATA(16:0)
ALRAM_DATA(16:0)
/ALRAM_WE
2.8
1.5
2.6
1.5
2.9
1.2
Tdh
Twesu
Tweh
/ALRAM_WE
Figure 58 shows the channel RAM read timing.
CHRAM READ CYCLE
1
2
3
4
5
Tcyc
Tch
Tcl
CH_RAM_CLK
Tadh
Tadss
/CH_RAM_ADSC
/CH_RAM_OE
Toesu
Toeh
Tas
Tas
Tah
CH_RAM_ADD(17:0)
CH_RAM_ADD17N
Tah
Tweh
Twesu
/CH_RAM_WE
CH_RAM_DATA(31:0)
CH_RAM_PARITY0
CH_RAM_PARITY1
Trdh
Trdh
Trdh
Trds
VALID DATA
Trds
Trds
Figure 58. Channel RAM Read Timing
85
PMC [ PMC-SIERRA, INC ]
