Released
Datasheet
PM73487 QRT
PMC-Sierra, Inc.
PMC-980618
Issue 3
622 Mbps ATM Traffic Management Device
9.5.3 Receive Cell Buffer SDRAM/SGRAM Summary (Internal Structure)
Base address: 2000000h (8000000h byte)
Index: 10h
Entry number (refer to “AL_RAM_CONFIG” on page 105):
If AL_RAM_CONFIG = 0h, the entry number is 8K.
If AL_RAM_CONFIG = 1h, the entry number is 16K.
If AL_RAM_CONFIG = 2h, the entry number is 64K.
If AL_RAM_CONFIG = 3h, the entry number is 64K.
Read/Write: use RX_DRAM_REGISTER
Long address = 2000000h + entry_number × 10h
Table 45. Receive Cell Buffers SDRAM/SGRAM Summary
Cell
Offset
31:24
23:16
15:8
7:0
0
VPI(11:4)
VPI(3:0),
VCI(11:4)
VCI(3:0) PTI, CLP
VCI(15:12)
1
2
payload 0
payload 4
payload 8
payload 12
payload 16
payload 20
payload 24
payload 28
payload 32
payload 36
payload 40
payload 44
00h
payload 1
payload 5
payload 9
payload 13
payload 17
payload 21
payload 25
payload 29
payload 33
payload 37
payload 41
payload 45
00h
payload 2
payload 6
payload 10
payload 14
payload 18
payload 22
payload 26
payload 30
payload 34
payload 38
payload 42
payload 46
00h
payload 3
payload 7
3
payload 11
payload 15
payload 19
payload 23
payload 27
payload 31
payload 35
payload 39
payload 43
payload 47
0h, Parity(3:0)
Not used
4
5
6
7
8
9
10
11
12
13
14
15
Not used
Not used
Not used
Not used
Not used
Not used
Not used
202
PMC [ PMC-SIERRA, INC ]
