Released
Datasheet
PM73487 QRT
PMC-Sierra, Inc.
PMC-980618
Issue 3
622 Mbps ATM Traffic Management Device
Figure 71. TAP Controller Finite State Machine
TRSTB=0
Test-Logic-Reset
0
1
0
1
1
1
Run-Test-Idle
Select-IR-Scan
0
Select-DR-Scan
0
1
1
Capture-IR
0
Capture-DR
0
Shift-IR
1
Shift-DR
1
0
0
1
1
Exit1-IR
0
Exit1-DR
0
Pause-IR
1
Pause-DR
1
0
0
0
0
Exit2-IR
1
Exit2-DR
1
Update-IR
Update-DR
1
0
1
0
All transitions dependent on input TMS
Test-Logic-Reset:
The test logic reset state is used to disable the TAP logic when the device is in
normal mode operation. The state is entered asynchronously by asserting input,
TRSTB. The state is entered synchronously regardless of the current TAP con-
troller state by forcing input, TMS high for 5 TCK clock cycles. While in this state,
the instruction register is set to the IDCODE instruction.
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