S/UNI®-JET Data Sheet
Released
Register 382H: TXCP-50 Cell Count Status
Bit
Type
R/W
R
Function
XFERE
XFERI
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
X
X
X
1
0
0
0
R
OVR
Unused
Reserved
Reserved
Reserved
Reserved
R/W
R/W
R/W
R/W
Reserved
These bits should be set to their default values for proper operation
XFERI
The XFERI bit indicates that a transfer of Transmit Cell Count data has occurred. A logic one
in this bit position indicates that the Transmit Cell Count Registers have been updated. This
update is initiated by writing to one of the Transmit Cell Count Register locations or to the
S/UNI-JET Identification, Master Reset, and Global Monitor Update Register. XFERI is set
to logic zero when this register is read.
OVR
The OVR bit is the overrun status of the Transmit Cell Count Registers. A logic one in this bit
position indicates that a previous transfer (indicated by XFERI being logic one) has not been
acknowledged before the next accumulation interval has occurred and that the contents of the
Transmit Cell Count Registers have been overwritten. OVR is set to logic zero when this
register is read.
XFERE
The XFERE bit enables the generation of an interrupt when an accumulation interval is
completed and new values are stored in the Transmit Cell Count Registers. When XFERE is
set to logic one, the interrupt is enabled.
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990267, Issue 3
215
PMC [ PMC-SIERRA, INC ]
