PM7340 S/UNI-IMA-8
PRELIMINARY
INVERSE MULTIPLEXING OVER ATM
DATA SHEET
PMC-2001723
ISSUE 3
INVERSE MULTIPLEXING OVER ATM
3. In non-multiplexed address/data bus architectures, ALE should be held high so that
parameters tSALR, tHALR, tVL, and tSLR are not applicable.
4. Parameter tHAR is not applicable if address latching is used.
Table 41
Symbol
tSAW
Microprocessor Interface Write Access
Parameter
Min
Max
Units
Address to Valid Write Set-up
Time
5
ns
Data to Valid Write Set-up
Time
10
ns
tSDW
Address to Latch Set-up Time
Address to Latch Hold Time
Valid Latch Pulse Width
Latch to Write Set-up
5
ns
ns
ns
ns
ns
ns
ns
tSALW
tHALW
tVL
5
20
0
tSLW
tHLW
tHDW
tHAW
Latch to Write Hold
5
Data to Valid Write Hold Time
5
Address to Valid Write Hold
Time
5
Valid Write Pulse Width
20
ns
tVWR
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PMC [ PMC-SIERRA, INC ]
