PM7340 S/UNI-IMA-8
PRELIMINARY
INVERSE MULTIPLEXING OVER ATM
DATA SHEET
PMC-2001723
ISSUE 3
INVERSE MULTIPLEXING OVER ATM
Symbol
Description
Min
Max Units
D
RCLK Duty Cycle
40
4
60
%
CLK
Ts
Input Set-up time to RCLK (except
RCSB)
ns
Ts
Input Set-up time to RCLK (RCSB)
Input Hold time to RCLK
RCLK High to Output Valid
RCLK High to Output High-Impedance
RCLK High to Output Driven
6
0
1
1
0
ns
ns
ns
ns
ns
Th
Tp
Tz
Tzb
12
12
Maximum output propagation delays are measured with an 50pF load on the
outputs.
Minimum output propagation delays are measured with a 0 pF load on the
outputs.
Table 47
Symbol
Serial Link Input
Description
Min
Max
Units
RSCLK[7:0] Frequency (See Note 1) 1.542
RSCLK[7:0] Frequency (See Note 2) 2.046
RSCLK[7:0] (See Note 3)
1.546
2.05
2.304
60
MHz
MHz
MHz
%
RSCLK[7:0] Duty Cycle
RSDATA[7:0] Set-Up Time
RSDATA[7:0] Hold Time
40
5
tS
Ns
RD
tH
5
Ns
RD
Notes:
1. Applicable only to channelized T1 links and measured between framing bits.
2. Applicable only to channelized E1 links and measured between framing bytes.
3. Applicable only to unchannelized links of any format and measured between any two
RCLK rising edges
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
309
PMC [ PMC-SIERRA, INC ]
