PM7340 S/UNI-IMA-8
PRELIMINARY
INVERSE MULTIPLEXING OVER ATM
DATA SHEET
PMC-2001723
ISSUE 3
INVERSE MULTIPLEXING OVER ATM
the Indirect Link Data registers. Writing a logic 1 to LRWB triggers an indirect
read operation. The read data can be found in the Indirect Link Data registers.
LBUSY:
The indirect access status bit (LBUSY) reports the progress of an indirect
access. A write to the Indirect Link Address register triggers an indirect access
and sets LBUSY to logic 1. LBUSY stays high until the access is completed.
At which point, LBUSY will be set low. This register should be polled to
determine either: (1) when data from an indirect read operation is available in
the Indirect Data register or (2) when a new indirect write operation may
commence.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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PMC [ PMC-SIERRA, INC ]
