S/UNI®-ATLAS-3200 Telecom Standard Product Data Sheet
Preliminary
Pin Name
TDO
Type
Tristate
Pin No Function
The test data output (TDO) signal carries test data out of the
S/UNI-ATLAS-3200 via the IEEE P1149.1 test access port. TDO
is updated on the falling edge of TCK. TDO is a tri-state output
which is tri-stated except when the scanning of data is in
progress
TRSTB
Schmitt
Trigger
Input
The active low test reset (TRSTB) signal provides an
asynchronous S/UNI-ATLAS-3200 test access port reset via the
IEEE P1149.1 test access port. TRSTB is a Schmitt triggered
input with an integral pull-up resistor.
The JTAG TAP controller must be initialized when the S/UNI-
ATLAS-3200 is powered up. If the JTAG port is not used,
TRSTB must be connected to the RSTB input or VSS.
Internal
Pull-Up
DRAM Test (2 Pins)
Reserved
Input
This pin must be tied to logic 1 in operation to avoid permanent
damage to the device.
Internal
Pull-up
Reserved
Input
This pin must be tied to logic 1 to ensure correct operation.
Internal
Pull-up
ZETMDL
ZETMDR
Power/Ground
VDD33
VDD25
VDDQ25
I/O
I/O
This pin must be tied to logic 0 for proper operation
This pin must be tied to logic 1 for proper operation
Power
Power
Power
3.3V I/O Power.
2.5V I/O Power
2.5V DRAM Core Power. This supply should be kept quiet to
improve DRAM performance.
VDDQ15
Power
1.5V DRAM Core Power. This supply should be kept quiet to
improve DRAM performance.
VDD15
VSS
Power
Ground
1.5V Core Power
Common Ground
Notes on Pin Description:
1. All S/UNI-ATLAS-3200 inputs and bi-directionals present minimum capacitive loading and operate at
LVTTL logic levels.
2. All inputs and bi-directionals have internal pull-up resistors.
3. The recommended power supply sequencing is as follows:
3.1 During power-up, VDD33 must be brought up before or at the same time as VDD25 and VDDQ25,
which must be brought up before or at the same time as VDD15 and VDDQ15.
3.2 The VDD33 and VDD25 power must be applied before input pins are driven or the input current per
pin be limited to less than the maximum DC input current specification. (10 mA)
3.3 Power down the device in the reverse sequence.
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990553, Issue 4
62
PMC [ PMC-SIERRA, INC ]
