S/UNI®-ATLAS-3200 Telecom Standard Product Data Sheet
Preliminary
Pin Name
OCIF_CTRL
Type
Output
Pin No Function
(A) RPU_CLAV
(A) Cell available. RPU_CLAV is asserted in response to polling
on RPU_ADDR to indicate that at least one complete cell is
available on the PHYID specified by RPU_CLAV.
If the interface is configured to look like a single-phy interface (via
the SERVEOVRD bit in the RxP Configuration Register) then this
bit indicates whether any complete cells are ready for transfer.
(B) TLU_WRENB
(C) RPP_VAL
(B) Write enable. TLU_WRENB is asserted to enable the transfer
of cell data. On the last cycle before it is asserted, the
TLU_ADDR indicates the PHYID to which the subsequent cell
belongs.
(C) Data valid. RPP_VAL indicates the validity of the receive data
signals. RPP_VAL is low between transfers, when RPP_SX is
asserted, and when the S/UNI-ATLAS-3200 pauses a transfer
due to an empty FIFO. When a transfer is paused by holding
RPP_ENB low, RPP_VAL will hold its value unchanged, although
no new data will be present on RDAT[31:0] until the transfer
resumes.
When RPP_VAL is high, the RPP_DAT[31:0], RPP_MOD[1:0],
RPP_SOP, RPP_EOP and RPP_ERR signals are valid. When
RPP_VAL is low, the RPP_DAT[31:0], RPP_MOD[1:0],
RPP_SOP, RPP_EOP and RPP_ERR signals are invalid and
must be disregarded.
The RPP_SX signal is valid when RPP_VAL is low.
(D) TLP_ENB
(D) Write enable. The TLP_ENB signal is used to control the flow
of data to the transmit FIFOs. When TLP_ENB is high, the
TLP_DAT, TLP_MOD, TLP_SOP, TLP_EOP and TLP_ERR
signals are invalid and are ignored by the PHY. The TLP_SX
signal is valid and is processed by the PHY when TLP_ENB is
high.
When TLP_ENB is low, the TLP_DAT, TLP_MOD, TLP_SOP,
TLP_EOP and TLP_ERR signals are valid and are processed by
the PHY. Also, the TLP_SX signal is ignored by the PHY when
TLP_ENB is low.
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990553, Issue 4
57
PMC [ PMC-SIERRA, INC ]
