S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Released
HSCR:
The Header Scramble enable bit, HSCR, enables scrambling of the ATM five octet header
along with the payload. When set to logic one, the ATM header and payload are both
scrambled. When set to logic zero, the header is left unscrambled and payload scrambling
is determined by the DSCR bit.
Reserved:
The reserved bits must be programmed to logic zero for proper operation.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
235