S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Released
Register 0x081, 0x181, 0x281, 0x381, 0x481, 0x581, 0x681, 0x781:
TXCP Configuration 2
Bit
Type
Function
Unused
Unused
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
X
X
X
0
0
0
0
0
Unused
R/W
R/W
R/W
R/W
R/W
Reserved
Reserved
Reserved
DHCS
HCSCTLEB
HCSCTLEB:
The active low HCS control enable, HCSCTLEB bit enables the XORing of the HCS
Control byte with the generated HCS. When set to logic zero, the HCS Control byte
provided in the third word of the 27 word data structure is XORed with the generated HCS.
When set to logic one, XORing is disabled and the HCS Control byte is ignored.
For normal operation, the HCS Control byte in the ATM cell structure transferred on the
system interface should always be 0x00. If not, the HCSCTLEB register should be set to
logic one to prevent corruption of the HCS byte.
DHCS:
The DHCS bit controls the insertion of HCS errors for diagnostic purposes. When DHCS is
set to logic one, the HCS octet is inverted prior to insertion in the synchronous payload
envelope. DHCS takes effect unconditionally regardless of whether a null/unassigned cell
is being transmitted or whether the HCS octet has been read from the FIFO. DHCS occurs
after any error insertion caused by the Control Byte in the 27-word data structure.
Reserved
All reserved bits must be programmed to default values for proper operation.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
236
PMC [ PMC-SIERRA, INC ]
