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PM5380-BI 参数 Datasheet PDF下载

PM5380-BI图片预览
型号: PM5380-BI
PDF下载: 下载PDF文件 查看货源
内容描述: [Micro Peripheral IC,]
分类和应用:
文件页数/大小: 440 页 / 2124 K
品牌: PMC [ PMC-SIERRA, INC ]
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S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet  
Released  
Register 0x060, 0x160, 0x260, 0x360, 0x460, 0x560, 0x660, 0x760:  
RXCP Configuration 1  
Bit  
Type  
R/W  
R/W  
Function  
DDSCR  
HDSCR  
Unused  
Unused  
Unused  
HCSADD  
Reserved  
Unused  
Default  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
0
0
X
X
X
1
0
X
R/W  
R/W  
HCSADD:  
6
4
2
The HCSADD bit controls the addition of the coset polynomial, x +x +x +1, to the HCS  
octet prior to comparison. When HCSADD is a logic one, the polynomial is added, and the  
resulting HCS is compared. When HCSADD is a logic zero, the polynomial is not added,  
and the unmodified HCS is compared.  
HDSCR:  
43  
HDSCR enables the self-synchronous x + 1 descrambler to continue running through the  
bytes which should contain the ATM cell headers. When HSCR is set low, the  
descrambling polynomial will function only over the ATM payload bytes. When HDSCR is  
set high, the descrambling polynomial will function over all bytes, including the 5 ATM  
header bytes. This function is available for use with PPP packets and flags which are  
scrambled at the source to prevent the generation of “killer” sequences.  
DDSCR:  
43  
The DDSCR bit controls the descrambling of the cell payload with the polynomial x + 1.  
When DDSCR is set high, cell payload descrambling is disabled. When DDSCR is set low,  
payload descrambling is enabled.  
Reserved:  
The reserved bits must be programmed to logic zero for proper operation.  
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.  
Document No.: PMC- 2010299, Issue 2  
219  
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