S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Released
Register 0x05D, 0x15D, 0x25D, 0x35D, 0x45D, 0x55D, 0x65D, 0x75D:
CRSI Status
Bit
Type
Function
LOCK
LOTV
ROOLV
DOOLV
Unused
LOTE
ROOLE
DOOLE
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R
R
R
R
X
X
X
X
X
0
R/W
R/W
R/W
0
0
DOOLE:
The DOOLE bit is an interrupt enable for the recovered data out of lock status. When
DOOLE is set to logic one, an interrupt is generated upon assertion and negation events of
the DOOLV register. When ROOLE is set low, changes in the DOOL status does not
generate an interrupt.
ROOLE:
The ROOLE bit enables the reference out of lock indication interrupt. When ROOLE is set
high, an interrupt is generated upon assertion and negation events of the ROOLV register.
When ROOLE is set low, changes in the ROOL status does not generate an interrupt.
LOTE:
The LOTE bit enables the loss of transition indication interrupt. When LOTE is set high, an
interrupt is generated upon assertion events of the LOTV register. When LOTE is set low,
changes in the LOTV status does not generate an interrupt.
DOOLV:
The recovered data out of lock status indicates the clock recovery phase locked loop is
unable to recover and lock to the input data stream. DOOLV is a logic one if the divided
down recovered clock frequency is not within approximately 488ppm of the REFCLK
frequency or if no transitions have occurred on the RXD input for more than 96 bits.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
217
PMC [ PMC-SIERRA, INC ]
