PM4341AT1XC
DATA SHEET
PMC-900602
ISSUE 7
T1 FRAMER/TRANSCEIVER
Table 5
-Transmit Clock Options
InputTransmit
Data
Bit Settings
XCLK Freq
Affect on Output
Transmit Data
Backplane
HSBPSEL =0
XCLKSEL =0
OCLKSEL1 =0
OCLKSEL0 =0
37.056MHz
Jitter attenuated.
TCLKO is a
smooth
transmit data
timed to 1.544
MHz BTCLK.
1.544MHz.
TCLKO
referenced to
BTCLK.
PLLREF1
PLLREF0
=0
=X
TCLKISEL =0
TCLKO
SMCLKO
PLLREF1
PLLREF0
PLLREF1
PLLREF0
=0
=1
=0
=1
=1
referenced to
RCLKO.
TCLKO
referenced to
TCLKI.
Backplane
transmit data
timed to
HSBPSEL =1
XCLKSEL =0
OCLKSEL1 =0
OCLKSEL0 =0
37.056MHz
Jitter attenuated.
TCLKO is a
smooth
2.048MHz
1.544MHz.
BTCLK. Internal
transmit clock is
"gapped".
TCLKO
referenced to
internal "gapped"
transmit clock.
PLLREF1
PLLREF0
=0
=0
TCLKISEL =0
TCLKO
referenced to
2.048MHz
BTCLK.
SMCLKO
PLLREF1
PLLREF0
PLLREF1
PLLREF0
=0
=0
=1
=1
=0
TCLKO
referenced to
RCLKO.
TCLKO
referenced to
TCLKI.
PLLREF1
PLLREF0
=1
=1
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
81
PMC [ PMC-SIERRA, INC ]
