PM4341AT1XC
DATA SHEET
PMC-900602
ISSUE 7
T1 FRAMER/TRANSCEIVER
Note that where a gapped backplane transmit clock is used, the DJAT SYNC bit
must be disabled. Where DJAT is unused, the DJAT SYNC, CENT and LIMIT bits
must be disabled.
Upon reset of the T1XC, the Transmit Timing Options bits are cleared to zero,
selecting digital jitter attenuation with TCLKO referenced to the backplane
transmit clock, BTCLK.The following Figure 12 illustrates the various bit setting
options, with the reset condition highlighted.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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