PM4341AT1XC
DATA SHEET
PMC-900602
ISSUE 7
T1 FRAMER/TRANSCEIVER
logic 0, the backplane transmit data rate and format is identical to T1 (i.e.
1.544MHz rate with 24 contiguous channel bytes followed by 1 framing bit).
BTX2RAIL:
The BTX2RAIL bit selects whether the backplane transmit data signal
presented to the transmitter on the multifunction inputs BTPCM/BTDP and
BTSIG/BTDN are in either dual-rail or single-rail format. When BTX2RAIL is
set to logic 1, the multifunction pins become the BTDP and BTDN dual-rail
inputs, which bypass the XBAS and input directly into the jitter attenuator. It is
expected that the framing bits be already inserted into the dual-rail streams
before they are input on BTDP and BTDN. When BTX2RAIL is set to logic 0,
the multifunction pins become the BTPCM and BTSIG digital inputs.The dual-
rail mode works correctly only when the backplane data rate is set to 1.544
MHz.
BTXSFP:
The BTXSFP bit selects the type of backplane frame alignment signal
presented to the transmitter BTFP input. When BTXSFP is set to logic 1, a
pulse on the BTFP indicates the first framing bit of the 12 frame SF or the 24
frame ESF (depending on the framing format selected in the XBAS ). When
BTXSFP is set to logic 0, a pulse on the BTFP indicates each framing bit. If
the signalling aligner is used to ensure signalling bit integrity while XBAS
generates an arbitrary superframe alignment between the backplane and the
transmit DS-1 stream (i.e. SIGAEN is logic 1 and TXSIGA is logic 1 in register
06H), then BTXSFP must be set to logic 0. If the superframe alignment of the
backplane is to be enforced on the transmit DS-1 stream, the BTXSFP bit
must be set to logic 1. In this case the signalling aligner is unnecessary.
Upon reset of the T1XC, these bits are cleared to zero.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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