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PM4341A-QI 参数 Datasheet PDF下载

PM4341A-QI图片预览
型号: PM4341A-QI
PDF下载: 下载PDF文件 查看货源
内容描述: T1成帧器/收发器 [T1 FRAMER/TRANSCEIVER]
分类和应用: 数字传输控制器电信集成电路电信电路
文件页数/大小: 288 页 / 981 K
品牌: PMC [ PMC-SIERRA, INC ]
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PM4341AT1XC  
DATA SHEET  
PMC-900602  
ISSUE 7  
T1 FRAMER/TRANSCEIVER  
format is identical to T1 (i.e. 1.544MHz rate with 24 contiguous channel bytes  
followed by 1 framing bit).  
BRX2RAIL:  
The BRX2RAIL bit selects whether the backplane receive data signal on the  
multifunction outputs BRPCM/BRDP and BRSIG/BRDN are in either dual rail  
or single rail format. When BRX2RAIL is set to logic 1, the multifunction pins  
become the BRDP and BRDN dual rail outputs, which contain the received  
positive and negative line pulses timed to the 1.544MHz receive line rate,  
RCLKO. When BRX2RAIL is set to logic 0, the multifunction pins become the  
BRPCM and BRSIG digital outputs.  
BRXSFP:  
The BRXSFP bit selects the output signal seen on the backplane output  
BRFPO. When set to logic 1, the BRFPO output pulses high during the first  
framing bit of the 12 frame SF or the 24 frame ESF (depending on the  
framing format selected in the FRMR ). When BRXSFP is set to logic 0, the  
BRFPO output pulses high during each framing bit (i.e. every 193 bits).  
ALTBRFP:  
The ALTBRFP bit suppresses every second output pulse on the backplane  
output BRFPO. When ALTBRFP is set to logic 1, the output signal on BRFPO  
pulses every 386 bits, indicating every second framing bit (if the BRXSFP bit  
is logic 0); or the output signal on BRFPO pulses every 24 or 48 frames (if the  
BRXSFP bit is logic 1). This latter setting (i.e. both ALTBRFP and BRXSFP  
set to logic 1) is useful for converting SF formatted data to ESF formatted  
data between two T1XC devices. When ALTBRFP is set to logic 0, the output  
signal on BRFPO pulses in accordance to the BRXSFP bit setting.  
RXMTKC:  
The RXMTKC bit allows global trunk conditioning to be applied to the  
received data and signalling streams, BRPCM and BRSIG. When RXMKTC  
is set to logic 1, the data on BRPCM for each channel is replaced with the  
data contained in the data trunk conditioning registers within RPSC; similarly,  
the signalling data on BRSIG for each channel is replaced with the data  
contained in the signalling trunk conditioning registers. When RXMKTC is set  
to logic 0, the data and signalling signals are modified on a per-channel basis  
in accordance with the control bits contained in the per-channel control  
registers within the RPSC.  
Upon reset of the T1XC, these bits are cleared to zero.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
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