PM4341AT1XC
DATA SHEET
PMC-900602
ISSUE 7
T1 FRAMER/TRANSCEIVER
Register 00H:T1XC Receive Options
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
UNF
X
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
ELSTBYP
TRSLIP
SRPCM
SRSFP
ALTRFP
CCOFA
This register allows software to configure the receive functions of the T1XC.
UNF:
The UNF bit allows the T1XC to operate with unframed DS-1 data. When
UNF is set to logic 1, the FRMR is disabled and the recovered data passes
through the receiver section of the T1XC without frame or channel alignment.
While UNF is held at logic 1, the Alarm Integrator continues to operate and
detects and integrates RED and AIS alarm. When UNF is set to logic 0, the
T1XC operates normally, searching for frame alignment on the incoming data.
ELSTBYP:
The ELSTBYP bit allows the Elastic Store (ELST) to be bypassed,
eliminating the one frame delay incurred through the ELST. When set to logic
1, the received data and clock inputs to ELST are internally routed directly to
the ELST outputs.
TRSLIP:
The TRSLIP bit allows the ELST to be used to measure, through SLIP
indications, the frequency difference between the recovered receive line clock
and the transmit clock driving the XBAS when the ELST is bypassed. When
TRSLIP is set to logic 1, the transmit clock input to XBAS is internally
substituted for the BRCLK input to the system side of the ELST. When
TRSLIP is set to logic 0, the BRCLK input is routed to the system side of the
ELST.The TRSLIP bit is valid only when ELSTBYP is set to logic 1.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
64
PMC [ PMC-SIERRA, INC ]
