TransDimension Inc.
Interfacing TD242LP to Intel StrongArm SA1110 Processor
97 ns
> 38 ns
10 ns
CS
19 ns
68 ns
RD or WR
Figure 14: SA1110 bus cycle generated using parameters of Figure 13
Note that these settings are based on the assumption that the SA1110 is running at an internal
clock of 206 MHz derived from an external 3.686 MHz oscillator. They are set for the SA1110
to generate near-optimal access cycles satisfying the TD242LP specification. It is advised that
one starts with a much looser (slower) set of timing parameters, such as FFFDH, applied to the
upper 16-bits of this register, and then have them fine-tuned towards optimal performance.
For SA1110, nCS5 is associated with a static memory bank supporting variable latency bus
cycle. Since the TD242LP is accessed with bus cycles of fixed length, one must make sure that
SA1110’s RDY pin is asserted (ready) whenever the TD242LP is being accessed.
Software Controlled TD242LP Reset
It is assumed that GPIO27 of the SA1110 is employed to support software controlled /RESET
for the TD242LP. The SA1110 GPIO registers should be initialized according to Figure 15.
Register
GPDR
GPSR
Register Full Name
GPIO Pin Direction Register
GPIO Pin Output Set Register
GPIO Alternate Function Register
Bit 27
Meaning
output
no reset
gpio
Default
1
1
0
0
undefined
0
GAFR
Figure 15: SA1110 GPIO register settings to support software generated /RESET
To issue a TD242LP reset through software, one must
Step 1: Write to GPIO register GPCR (GPIO Pin Output Clear Register) with a bit pattern such
that Bit 27 = 1. This asserts the active low TD242LP pin /RESET.
Step 2: Wait for at least 50 µs to meet the minimum /RESET assertion time of the TD242LP.
Step 3: Write to GPIO register GPSR (GPIO Pin Output Set Register) with a bit pattern such that
Bit 27 = 1. This de-asserts the active low TD242LP pin /RESET.
Interrupt: SA1110 Configuration
In the following discussion, it is assumed that GPIO14 of the SA1110 is connected to
TD242LP’s INT pin, which has been programmed to be active low with totem-pole output.
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