TransDimension Inc.
Interfacing TD242LP to Intel StrongArm SA1110 Processor
the
ENVREG
pin is tied to GND, the internal 3.3V-to-2.5V internal voltage regulator is disabled
and the VDD2.5 power pins must be driven by an external 2.5V power source.
Bus Control:
/CS, /RD,
and
/WR
In this reference design, the TD242LP is accessed through SA1110’s Static Bank 5. Thus
TD242LP chip select
/CS,
read strobe
/RD,
and write strobe
/WR
should be tied to
nCS5, nOE,
and
nWE
of the SA1110, respectively.
Address Bus:
A
12
:A
1
The TD242LP address bus
A
12
:A
1
is connected to
A12:A1
of the SA1110.
Data Bus:
D
15
:D
0
The 16-bit data bus of the TD242LP
D
15
:D
0
should be connected to
D15:D0
of the SA1110.
Hardware Reset:
/RESET
For many applications, the TD242LP
/RESET
can be tied to SA1110’s system reset (nRESET or
nRESET_OUT).
However, it is recommended that an SA1110 GPIO pin be allocated as the
TD242LP hardware reset for flexibility of user software.
In this reference design,
GPIO27
of the SA1110 is assigned to the TD242LP’s
/RESET,
and its
selection depends on the application. To improve reliability, a pull-up resistor is desired. An RC
filter circuit is highly recommended to eliminate unexpected noise triggered reset. The TD242LP
requires a minimum /RESET assertion of 50us.
Interrupt:
INT
The interrupt signal
INT
generated by the TD242LP must be tied to one of the GPIO pins of the
SA1110. In this reference design, SA1110 pin
GPIO14
is employed, and its selection again
depends on the application.
Note that the active level (active high or active low) and the output type (totem-pole or wired
OR) of the TD242LP INT pin are programmable. For this reference design, the TD242LP INT
pin is to be programmed to active low, totem-pole operation. A pull-up resistor is recommended.
Crystal Oscillator and PLL:
OSC
1
and
OSC
2
In the reference design, a 6 MHz parallel resonance quartz crystal is connected across
OSC
1
and
OSC
2
. The following circuit is recommended.
TransDimension, Inc.
6
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