欢迎访问ic37.com |
会员登录 免费注册
发布采购

PEX8532-BB25BI 参数 Datasheet PDF下载

PEX8532-BB25BI图片预览
型号: PEX8532-BB25BI
PDF下载: 下载PDF文件 查看货源
内容描述: [PCI Bus Controller, CMOS, PBGA680, 35 X 35 MM, 2.23 MM HEIGHT, 1 MM PITCH, BGA-680]
分类和应用: 时钟数据传输PC外围集成电路
文件页数/大小: 512 页 / 4374 K
品牌: PLX [ PLX TECHNOLOGY ]
 浏览型号PEX8532-BB25BI的Datasheet PDF文件第167页浏览型号PEX8532-BB25BI的Datasheet PDF文件第168页浏览型号PEX8532-BB25BI的Datasheet PDF文件第169页浏览型号PEX8532-BB25BI的Datasheet PDF文件第170页浏览型号PEX8532-BB25BI的Datasheet PDF文件第172页浏览型号PEX8532-BB25BI的Datasheet PDF文件第173页浏览型号PEX8532-BB25BI的Datasheet PDF文件第174页浏览型号PEX8532-BB25BI的Datasheet PDF文件第175页  
February, 2007  
PCI Express Enhanced Configuration Mechanism  
Because the PCI r2.3-Compatible Configuration mechanism is limited to the first 256 bytes of the PCI  
Express Configuration Space of the PEX 8532 ports, the PCI Express Enhanced Configuration  
mechanism (described in Section 11.4.2) or PLX-Specific Memory-Mapped Configuration mechanism  
(described in Section 11.4.3) must be used to access beyond byte FFh. The PCI Express Enhanced  
Configuration mechanism can access the registers in the PCI-compatible region, as well as those in the  
PCI Express Extended Configuration space that are defined by PCI Express specifications; however, it  
generally cannot access the PEX 8532 device-specific registers above 100h. The PLX-Specific  
Memory-Mapped Configuration mechanism can access all PEX 8532 registers.  
11.4.2  
PCI Express Enhanced Configuration Mechanism  
The PCI Express Enhanced Configuration mechanism is implemented on all PCI Express PCs and on  
systems that do not implement a processor-specific firmware interface to the Configuration space,  
providing a Memory-Mapped Address space in the Root Complex through which the Root Complex  
translates a Memory access into one or more Configuration requests. Device drivers normally use an  
application programming interface (API) provided by the Operating System, to use the PCI Express  
Enhanced Configuration mechanism.  
The PCI Express Enhanced Configuration mechanism is used to access the PEX 8532 port Type 1  
(PCI-to-PCI Bridge) registers that are defined by PCI Express specifications:  
Configuration Header Registers  
Power Management Capability Registers  
Message Signaled Interrupt Capability Registers  
PCI Express Capability Registers  
Device Serial Number Extended Capability Registers  
Power Budgeting Extended Capability Registers  
Virtual Channel Extended Capability Registers  
Advanced Error Reporting Capability Registers  
The PEX 8532 device-specific registers that exist in the PCI Express Extended Configuration space  
(above 100h) generally cannot be accessed by the PCI Express Enhanced Configuration mechanism.  
The PLX-Specific Memory-Mapped Configuration mechanism (described in Section 11.4.3) can access  
all PEX 8532 registers.  
ExpressLane PEX 8532AA/BA/BB/BC 8-Port/32-Lane Versatile PCI Express Switch Data Book  
Copyright © 2007 by PLX Technology, Inc. All Rights Reserved – Version 1.6  
149  
 复制成功!