February, 2007
Single-Stream Throughput
The smaller the payload size, the higher demand on the ingress header credit to be advertised. Using the
same example provided above, but changing payload size from 64B to 4B, the number of ingress header
credits required is 40. As previously stated, the PEX 8532 contains a total of 32 VOQ entries in its
ingress ports. Although 30 VOQ entries can be allocated to the posted traffic, there is no way to sustain
the incoming traffic without stalling due to lack of credits.
Program Ingress Credit Threshold Rules
The PEX 8532 provides the capability to program the ingress credit value for each VC&T in the ingress
ports. Refer to Section 11.13.8.1, “INCH Threshold Port Virtual Channel Registers,” to view the
registers used to program the ingress credit value. The registers range from offsets A00h to A5Ch.
In the INCH Threshold Port Virtual Channel registers, header credit and payload credit thresholds are
writable. The following rules are used to program these registers:
• One unit of header credit threshold represents one packet. A value of 1 allows the PEX 8532 to
advertise 1 header credit, 2 allows 2 header credits, and so forth. Bits [13:9] allow a maximum
of 31 header credits to be programmed to VC&T.
• One unit of payload credit threshold represents 16B of data. When the PEX 8532 Maximum
Payload Size is set as 256, a value of at least 16 is required to be programmed for Posted and
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Completion packets. Bits [8:0] allow a maximum value of 2 payload credit units to be advertised.
For Posted and Completion types, bits [2:0] are reserved, which forces the payload credit
threshold to be powers of 8. This effectively makes the granularity for Posted and Completion
credit threshold types increase to 16B x 8 = 128B. For Non-Posted types, similar restrictions do
not apply, because the payload size is never more than 4B.
• For all ingress VC&Ts, the total header credit cannot exceed 32 in a port.
• For all VC&Ts in all four potential ports in a source station, the total payload credit cannot
exceed 1,376.
The default ingress header credit threshold for VC0 Posted, Non-Posted, and Completion types are
as follows:
• Silicon Revision AA – 5, 9, and 5, respectively
• Silicon Revisions BA, BB, BC – 12, 7, and 10 respectively
The default ingress data payload credit threshold for VC0 Posted, Non-Posted, and Completion types
are as follows:
• Silicon Revision AA – 88, 9, and 88, respectively
• Silicon Revisions BA, BB, BC – 144, 7, and 128 respectively
It is strongly recommended that to achieve better ingress throughput for a particular type, fine-tuning
ingress credit thresholds is an indispensable step. For example, when the PEX 8532 is “talking” to a
x8 graphics board, almost 28.5ꢀ throughput boost is observed by modifying the ingress header credit
for VC0 Posted, Non-Posted, and Completion types to be 15, 4, 13, and ingress payload credit to be
40, 4, and 40, respectively.
ExpressLane PEX 8532AA/BA/BB/BC 8-Port/32-Lane Versatile PCI Express Switch Data Book
Copyright © 2007 by PLX Technology, Inc. All Rights Reserved – Version 1.6
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