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PEX8532-BB25BI 参数 Datasheet PDF下载

PEX8532-BB25BI图片预览
型号: PEX8532-BB25BI
PDF下载: 下载PDF文件 查看货源
内容描述: [PCI Bus Controller, CMOS, PBGA680, 35 X 35 MM, 2.23 MM HEIGHT, 1 MM PITCH, BGA-680]
分类和应用: 时钟数据传输PC外围集成电路
文件页数/大小: 512 页 / 4374 K
品牌: PLX [ PLX TECHNOLOGY ]
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Performance Metrics  
PLX Technology, Inc.  
Ingress Credit Threshold Programming  
There are methods for changing the ingress credit threshold – by way of a serial EEPROM or direct CSR  
programming. The first approach is straightforward – program the required values and the link produces  
the programmed values. However, the latter approach requires further explanation.  
In the direct CSR programming method, if a credit threshold requires an increase, perform a CSR Write.  
This immediately results in a new UpdateFC to be transmitted, carrying the newly increased credits. In  
contrast, if a credit threshold requires a decrease, the PCI Express Base r1.0a does not provide a  
pre-defined method for reclaiming unused credit previously advertised to the external device. The  
danger of programming a smaller credit threshold than the initial value is that ingress packet storage can  
overflow if the external device is not aware of the credit threshold, and continues sending packets  
according to the initial credit threshold. Use the following approach to avoid packet RAM overflow:  
Upstream port  
Use CSR access to program the VC&Ts whose credit requires a decrease.  
Transmit “side-impact free” traffic from host to those VC&Ts, to deplete all credits to be  
reclaimed. Before the surplus credits are completely reclaimed, the PEX 8532 transmits  
UpdateFC for that VC&T. After the amount of incoming traffic attains the difference  
between the old and new credit thresholds, the PEX 8532 starts transmitting fresh UpdateFC  
DLLPs for incoming TLPs.  
Downstream ports  
Program all ingress credit threshold CSRs in all VC&Ts to the required values.  
Execute a Secondary Bus Reset in the Bridge Control register (offset 3Ch[22]=1)  
Release the reset. The newly programmed values take effect afterward.  
Ingress credit threshold registers are not sticky after a primary reset; therefore, this sequence requires  
repeating after any primary reset.  
Tip: If a serial EEPROM is available and you want to experiment with credit values, initially program  
all thresholds to 1. There is no impact in increasing the credit (up to the maximum of PEX 8532  
resources). This allows for the most flexibility in your experiments.  
8.4.2.2  
Egress Side  
Provide Sufficient Egress Credit  
The simplest way to improve an egress port’s throughput is to provide the PEX 8532 with sufficient  
egress credit. In general, the number of egress credit required by the PEX 8532 follows the same  
equation as the ingress credit calculation:  
Egress_Credit_Required = (Round_trip_time_in_clocks x link_width) /  
packet_size_in_bytes  
For the PEX 8532 to achieve pipelined performance, the external device is suggested to advertise at least  
two MPS worth of payload credits. For 128B MPS, the payload credit is greater than or equal to 16  
(16 credits = 296B = 2 MPS). For 256B MPS, the payload credit must be greater than or equal to 32  
(2 MPS). Although a packet’s payload is smaller than MPS, without a 2 MPS credit, the PEX 8532  
schedules one packet out, waits for the updateFC to return, then schedules the next packet out.  
110  
ExpressLane PEX 8532AA/BA/BB/BC 8-Port/32-Lane Versatile PCI Express Switch Data Book  
Copyright © 2007 by PLX Technology, Inc. All Rights Reserved – Version 1.6  
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