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L3 wake-up pulse after power-up
L3CLOCK
L3MODE
device address
register address
data byte 1
data byte 2
0
1
0
L3DATA
MGS753
DOM bits
write
Fig.15 Data write mode.
L3CLOCK
L3MODE
device address
register address
device address
register address
data byte 1
data byte 2
0
1
1
1
1
0/1
L3DATA
DOM bits
read
valid/non-valid
prepare read
send by the device
MGS754
Fig.16 Data read mode.
NXP [ NXP ]
