Philips Semiconductors
Preliminary specification
Stereo audio codec with SPDIF interface
UDA1355H
MODE
FEATURES
SCHEMATIC
9
Data path:
• Input SPDIF to output I2S
• Input I2S to outputs DAC or SPDIF.
Features:
SPDIF LOCK
XTAL
PLL
MUTE
• Possibility to process input SPDIF, via
I2S-bus using an external DSP and
then to outputs DAC or SPDIF
DAC
SPDIF IN
• BCK and WS being master for both I2S
SPDIF OUT
input and output (different clocks)
2
I S INPUT
2
I S OUTPUT
• Input I2S to outputs DAC and SPDIF;
BCK and WS being master; clocks
based on crystal oscillator
2
2
I S slave
I S master
EXTERNAL DSP
(e.g. Sample Rate Convertor)
(SAA7715)
• Microcontroller mode:
– DAC sound features can be used
MGU845
– SPDIF output channel status bits
(two times 40) setting.
10
Data path:
• Input SPDIF to output DAC or I2S
• Input I2S-bus to output SPDIF.
Features:
• Possibility to process input SPDIF, via
I2S-bus using an external DSP and
then to output SPDIF
SPDIF LOCK
XTAL
PLL
MUTE
DAC
• Input SPDIF to outputs I2S and DAC;
locking onto the SPDIF input signal;
BCK and WS being master
• Input I2S to output SPDIF; BCK and
WS being master; clocks are
SPDIF IN
SPDIF OUT
2
I S INPUT
2
I S OUTPUT
generated by the crystal oscillator
2
2
I S slave
I S master
• Microcontroller mode:
EXTERNAL DSP
(e.g. Sample Rate Convertor)
(SAA7715)
– DAC sound features can be used
– SPDIF input channel status bits
(two times 40) can be read
MGU846
– SPDIF output channel status bits
(two times 40) setting.
11
12
13
14
15
Not used
See microcontroller mode
See microcontroller mode
See microcontroller mode
Not used
2003 Apr 10
25
NXP [ NXP ]
