Philips Semiconductors
Preliminary specification
Stereo audio codec with SPDIF interface
UDA1355H
MODE
FEATURES
SCHEMATIC
2
Data path:
• Input SPDIF to outputs I2S or
SPDIFOUT via loop through
• Input I2S to output DAC.
SPDIF LOCK
PLL
MUTE
Features:
DAC
• Possibility to process input SPDIF via
I2S-bus using an external DSP and
then to output DAC
SPDIFOUT
SPDIF IN
2
2
• System locks onto the SPDIF input
I S INPUT
I S OUTPUT
signal
2
2
I S slave
I S master
• I2S input and output with BCK and WS
are master
EXTERNAL DSP
(e.g. equalizing, spatializing)
(SAA7715)
• Microcontroller mode: see Section 8.4.
MGU838
3
Data path:
• Input ADC to outputs I2S or SPDIF.
Features:
XTAL
• Crystal oscillator generates the clocks
• Microcontroller mode:
– PGA gain setting
ADC
– Volume control in decimator setting
SPDIF OUT
– SPDIF output channel status bits
(two times 40 bits) setting.
2
2
I S master
I S OUTPUT
MGU839
4
Data path:
• Input ADC to output I2S
• Input I2S to outputs DAC or SPDIF.
Features:
XTAL
MUTE
ADC
DAC
• Possibility to process input ADC via
I2S-bus using a external DSP and then
to outputs DAC or SPDIF
SPDIF OUT
• Crystal oscillator generates the clocks
2
2
I S INPUT
I S OUTPUT
• I2S input and output with BCK and WS
are master
2
2
I S slave
I S master
• Microcontroller mode: see Section 8.4.
EXTERNAL DSP
(e.g. equalizing, spatializing)
(SAA7715)
MGU840
2003 Apr 10
22
NXP [ NXP ]
