Philips Semiconductors
Preliminary specification
Stereo audio codec with SPDIF interface
UDA1355H
MODE
FEATURE
See static mode
SCHEMATIC
6
7
8
9
See static mode
See static mode
Data path:
• Inputs ADC and I2S to outputs DAC or
SPDIF
• Input SPDIF to output I2S.
SPDIF LOCK
XTAL
PLL
Features:
MUTE
• Input SPDIF to output I2S with BCK
and WS being master; the clocks for
this are recovered from the SPDIF
input signal
ADC
DAC
• The rest of the clocks are generated by
SPDIF IN
SPDIF OUT
the crystal oscillator
2
2
I S INPUT
I S OUTPUT
• SPDIF input channel status bits (two
times 40) can be read
2
2
I S slave
I S master
• SPDIF output channel status bits (two
times 40) setting
EXTERNAL DSP
(e.g. Sample Rate Convertor)
(SAA7715)
• Possibility to process input SPDIF, via
I2S-bus using an external DSP and
then to outputs DAC or SPDIF.
MGU849
10
Data path:
• Inputs ADC and SPDIF to outputs DAC
or I2S
SPDIF LOCK
XTAL
PLL
• Input I2S to output SPDIF.
MUTE
ADC
Features:
DAC
• BCK and WS are master
• SPDIF input channel status bits (two
times 40) can be read
SPDIF IN
SPDIF OUT
• SPDIF output channel status bits (two
2
2
times 40) setting
I S INPUT
I S OUTPUT
• Possibility to process inputs ADC or
SPDIF, via I2S-bus using an external
DSP and then to output SPDIF.
2
2
I S slave
I S master
EXTERNAL DSP
(e.g. Sample Rate Convertor)
(SAA7715)
MGU850
11
Not used
2003 Apr 10
29
NXP [ NXP ]
