Philips Semiconductors
Product specification
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
SAA7146A
Table 40 Interrupt enable register
OFFSET
(HEX)
NAME
BIT
TYPE
DESCRIPTION
DC
PPEF
PABO
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
PCI Parity Error interrupt enable
PCI Access Error interrupt enable
PPED
PCI Parity Errors on ‘real time Data’ interrupt enable
enables interrupts issued by RPS commands in Task 1
enables interrupts issued by RPS commands in Task 0
RPS Task 1 late interrupt enable
RPS_I1
RPS_I0
RPS_late1
RPS_late0
RPS_E1
RPS_E0
RPS_TO1
RPS_TO0
UPLD
RPS Task 0 late interrupt enable
RPS_Error1 interrupt enable
RPS_Error0 interrupt enable
RPS time out Task 1 interrupt enable
RPS time out Task 0 interrupt enable
RPS Upload interrupt enable
DEBI_S
DEBI_E
IIC_S
DEBI Status interrupt enable
DEBI Error interrupt enable
I2C Status interrupt enable
I2C Error interrupt enable
IIC_E
A2_in
Audio input DMA2 protection interrupt enable
Audio output DMA2 protection interrupt enable
Audio input DMA1 protection interrupt enable
Audio output DMA1 protection interrupt enable
Audio FIFO Overflow/Underflow interrupt enable
Video address Protection Error interrupt enable
Video FIFO Overflow/Underflow interrupt enable
Field ID port A interrupt enable
A2_out
A1_in
A1_out
AFOU
V_PE
VFOU
FIDA
8
FIDB
7
Field ID port B interrupt enable
PIN3
6
GPIO Pin 3 interrupt enable
PIN2
5
GPIO Pin 2 interrupt enable
PIN1
4
GPIO Pin 1 interrupt enable
PIN0
3
GPIO Pin 0 interrupt enable
ECS
2
Event Counter 1, 2, 4 and 5 Status interrupt enable
Event Counter 3 Status interrupt enable
Event Counter 0 Status interrupt enable
EC3S
1
EC0S
0
1998 Apr 09
50
NXP [ NXP ]
