ISP1362
Single-chip USB OTG controller
Philips Semiconductors
• Size bits of an enabled endpoint (FFOSZ[3:0])
• Isochronous bit of an enabled endpoint (FFOISO).
Remark: A register change that affects the allocation of the shared buffer memory
storage among endpoints must not be made while valid data is present in any buffer
memory of the enabled endpoints. Such changes renders all buffer memory contents
undefined.
Table 15: Programmable buffer memory size
FFOSZ[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Non-isochronous
8 bytes
Isochronous
16 bytes
16 bytes
32 bytes
64 bytes
reserved
reserved
reserved
reserved
reserved
reserved
reserved
reserved
reserved
reserved
reserved
reserved
32 bytes
48 bytes
64 bytes
96 bytes
128 bytes
160 bytes
192 bytes
256 bytes
320 bytes
384 bytes
512 bytes
640 bytes
768 bytes
896 bytes
1023 bytes
Each programmable buffer memory can be independently configured by using its
ECR, but the total physical size of all enabled endpoints (IN plus OUT) must not
exceed 2462 bytes.
Table 16 shows an example of a configuration fitting in the maximum available space
of 2462 bytes. The total number of logical bytes in the example is 1311. The physical
storage capacity used for double buffering is managed by the device hardware and is
transparent to the user.
Table 16: Memory configuration example
Physical size
(bytes)
Logical size
(bytes)
Endpoint description
64
64
control IN (64-byte fixed)
64
64
control OUT (64-byte fixed)
double-buffered 1023-byte isochronous endpoint
16-byte interrupt OUT
2046
16
1023
16
16
16
16-byte interrupt IN
128
128
64
double-buffered 64-byte bulk OUT
double-buffered 64-byte bulk IN
64
9397 750 12337
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 — 06 January 2004
53 of 150
NXP [ NXP ]
